The present invention relates to a semiconductor device and manufacturing method thereof, and more particularly to a semiconductor device including a wiring layer and method for forming a wiring layer. The present invention is an improvement over the invention which is the subject matter of the present inventor's pending U.S. patent application Ser. No. 07/879,294 filed on Aug. 24, 1992 which is a continuation-in-part of the U.S. patent application Ser. No. 07/585,218 filed on Sep. 19, 1990, which has now been abandoned, and the disclosure of which is hereby incorporated into this application by reference.
The metallization process is regarded as being the most important matter of semiconductor device manufacturing technology, since it determines the yield, performance (e.g., speed of operation), and reliability of the devices, as the technology advances toward ultra large-scale integration (ULSI). Metal step coverage was not a serious problem in less dense prior art semiconductor devices, because of the inherent features of devices having larger geometries, e.g., contact holes having low aspect ratios (the ratio of depth to width), and shallow steps. However, with increased integration density in semiconductor devices, contact holes have become significantly smaller while impurity-doped regions formed in the surface of the semiconductor substrate have become much shallower. Due to the resulting higher aspect ratio of the contact holes and larger the steps, with these current, greater-density semiconductor devices, it has become necessary, to improve the conventional aluminum (Al) metallization process, in order to achieve the standard design objectives of high-speed performance, high yield, and good reliability of the semiconductor device. More particularly, the utilization of the conventional Al metallization process in the fabrication of the higher-density integrated semiconductor devices has resulted in such problems as degraded reliability and failure of the Al interconnections due to the high aspect ratio of the contact holes and poor step coverage of the sputtered Al, increase in contact resistance caused by silicon (Si) precipitation, and degradation of the shallow junction characteristics due to Al spiking.
FIG. 1 illustrates a cross-sectional view of a portion of a semiconductor wafer having a metal wiring layer formed thereon obtained according to a prior art method, which illustrates a void formation. Referring to FIG. 1, an insulating layer 5 is formed on a semiconductor substrate 1. Then, a contact hole having a high aspect ratio greater than one, which exposes an impurity-doped region 3 formed in a surface portion of semiconductor substrate 1, is formed in an insulating layer 5 and on impurity-doped region 3. Thereafter, a diffusion barrier layer 7 is formed on insulation layer 5, on the inner surface of the contact hole and on the exposed surface portion of impurity-doped region 3, and a metal layer 9a is deposited by a conventional sputtering method. Here, due to the high aspect ratio of the contact hole, an overhanging portion 15 of the deposited metal layer 9a is formed over the contact hole and a void 11a formation occur in the contact hole, which deteriorates the reliability of metal layer 9a of a semiconductor device.
In an effort to overcome these problems of the conventional Al metallization process, various new processes have been proposed. For example, for preventing degraded semiconductor reliability caused by the above-mentioned failure of Al interconnections ,the following processes have been proposed.
Melting methods have been disclosed in such patent publications such as Japanese Laid-Open Publication No. 62-132348 (by Yukiyasu Sugan et al.), Japanese Laid-Open Publication No. 63-99546 (by Shinpei Iijima), Japanese Laid-Open Publication No. 62-109341 (by Masahiro Shimizu et al.), Japanese Laid-Open Publication No. 62-211915 (by Hidekazu Okabayashi et al.), Japanese Laid-Open Publication No. 1-246831 (by Seiichi Iwamatsu), Japanese Laid-Open Publication No. 59-171374 (by Masaki Satou) and European Patent Application No. 87306084.3 (by Ryoichi Mukai et al.). Particularly, according to Yukiyasu Sugano et al teaching, a metal wiring layer comprised of a metal having a low melting temperature such as Al, Sn, In, Pb, Mg, Zn etc. or an alloy thereof is melted thermally, to thereby be flattened.
According to the above method, the contact hole is filled by means of melting and reflowing Al or an Al alloy. To summarize, in the reflowing step, the metal layer of Al or Al alloy is heated beyond its melting temperature, and the thus melted metal is flowed into the contact hole to fill the same. This reflowing step entails the following drawbacks and disadvantages. First of all, the semiconductor wafer must be disposed horizontally so as to allow proper filling of the contact hole with the flowing melted material. Secondly, the liquid metal layer flowed into the contact hole will seek a lower surface tension, and thus, may, upon solidifying, shrink or warp, and thereby expose the underlying semiconductor material. Further, the heat treatment temperature cannot be precisely controlled and therefore, given results are difficult to reproduce. Moreover, although these methods may fill a contact hole with the melted metal of the metal layer, the remaining areas of the metal layer (outside the contact hole area) may become rough, thereby impairing subsequent photolithography processes. Therefore, a second metallization process may be required to smooth or planarize these rough areas of the metal layer.
In the meantime, Ono et al. have disclosed that when the semiconductor substrate temperature is above 500.degree. C., the liquidity of Al-Si suddenly increases (in Proc., 1990 VMIC Conference, June 11 and 12, pp. 76-82). According to this paper, the stress of an Al-1% Si film changes abruptly near 500.degree. C., and the stress relaxation of such a film occurs rapidly at that temperature. Additionally, the temperature of the semiconductor substrate must be maintained between 500.degree. C. and 550.degree. C. in order to fill the contact holes satisfactorily.
Additionally, Yoda Dakashi et al. have suggested a method for manufacturing a semiconductor device which comprises the steps of forming double barrier layers for preventing a reaction between the wiring layer and the semiconductor substrate or an insulation layer, on the inner surface of the contact holes, and then filling the contact holes with a deposited metal such as an Al-Si alloy while heating the semiconductor substrate to a desired temperature of 500.degree. C. to 550.degree. C., as in Ono et al. paper (Korean Laid-open Patent Publication No. 90-15277 and European Patent Application No. 90104184.0 corresponding to Japanese Patent Application No. 01-061557 filed on Mar. 14, 1989.).
According to the Yoda Dakashi et al. and Ono et al. methods, an Al-Si film is deposited at a temperature of 500.degree. C. to 550.degree. C. The Al-Si film thus obtained has a grown-up large diameter of crystalline particles of about 10 microns. Therefore, there is a high probability that the Al-Si film has a strong resistance against electron migration but a weak resistance against stress migration. In addition, high resistant Si is crystallized at interfaces between crystalline particles of the Al-Si film. Thus, it is necessary to remove the Al-Si film at the areas other than the contact hole area and the metallization process become complicated. Additionally, since the Al-Si film is deposited at a high temperature, a void is formed or metal layer discontinuities occur. FIG. 2 illustrates a void formation 11b when depositing a metal layer at a high temperature. In the same figure, the reference numerals indicate the same portion as in FIG. 1, except for metal layer 9b deposited at a high temperature and void 11b. Also, FIG. 3 illustrates a discontinuity 13 of a metal layer 9c formed in a contact hole, when depositing a metal layer at a high temperature. In the same figure, the reference numerals indicate the same portion as in FIG. 1, except for metal layer 9c deposited at a high temperature and the short 13.
As an alternative to melting Al or Al alloy for filling contact holes, and in order to improve the metal step coverage, a multiple step metallization process is disclosed in U.S. Pat. No. 4,970,176 (Clarence J. Tracy et al.). According to this patent, a predetermined first thickness of a metal layer is deposited on a semiconductor wafer at a cold temperature. Then, the temperature is increased to approximately 400.degree. C. to 500.degree. C., which allows the metal layer to reflow while depositing the remaining and relatively thin second thickness of the metal layer. The reflow of the metal layer takes place through grain growth, recrystallization and bulk diffusion.
According to the Tracy et al. method, the step coverage of a contact hole (via hole) having a high aspect ratio can be improved. However, there is high probability that a void 11b as in FIG. 2 or a short 13 as in FIG. 3 forms in a metal layer, since the metal layer is deposited at a high temperature. Additionally, the aluminum or aluminum alloy cannot completely fill a contact hole having an aspect ratio greater than one and a diameter less than 1 .mu.m.
Additionally, C. S. Park et al. (which includes the present inventors) have disclosed a method for forming a metal wiring layer through a contact hole having a high aspect ratio which comprises the steps of depositing an aluminum alloy to a thickness of 3000 .ANG. at a low temperature below 100.degree. C. and post-heating the deposited aluminum alloy at a temperature of 550.degree. C. for 180 seconds to thereby completely fill up the contact hole with aluminum alloy, in Proc., 1991 VMIC Conference, June 11 and 12, pp. 326-328. This method is included in U.S. patent application Ser. No. 07/585,218 entitled "A Method for Forming a Metal Layer in a Semiconductor Device," which has now been abandoned and a continuation-in-part thereof is now pending in the USPTO as U.S. patent application Ser. No. 07/897,294.
FIGS. 4 through 6 show a method for forming a metal layer according to the above invention. FIG. 4 illustrates a step for forming a first metal layer. A 0.8 .mu.m-sized contact hole 22 having a step formed thereon is formed in an insulating layer 25 coated on semiconductor substrate 10. Then, substrate 21 is put into a sputtering reaction chamber (not shown), in which a first metal layer 27 is formed by depositing a metal such as aluminum (Al) or Al alloy, at a temperature of 150.degree. C. or less and under a predetermined degree of vacuum. First metal layer 27 thus obtained is comprised of small aluminum grains having a high surface free energy.
FIG. 5 illustrates the method of filling contact hole 22. More particularly, after the semiconductor wafer thus obtained is moved into another sputter reaction chamber (not shown), without breaking the vacuum, first metal layer 27 is heat-treated for at least two minutes at a temperature of 550.degree. C., thereby filling up the contact hole 22 with the metal. At this time, the pressure in the reaction chamber is preferably as low as possible so that the aluminum atoms have a higher surface free energy. In this manner, the metal atoms can more easily migrate into the contact holes, thereby filling them. The reference numeral 27a designates a metal layer filling contact hole 22.
The heat treatment temperature range in the step shown FIG. 5 is between 80% of the melting point of the metal and the melting point of the metal, and will vary according to the particular aluminum alloy or aluminum employed.
Since the metal layer is heat-treated at a temperature lower than aluminum's melting point, the metal layer does not melt. For example, at 550.degree. C., the Al atoms deposited by sputtering at a temperature below 150.degree. C. migrate upon heat-treatment at a higher temperature, instead of melting. This migration increases when the surface area is uneven or grainy due to an increase in energy among the surface atoms which are not in full contact with surrounding atoms. Thus, the initially sputtered, grainy layer exhibits an increase in atomic migration upon heat-treatment.
FIG. 6 illustrates a step for forming a second metal layer 29. More particularly, second metal layer 29 is formed by depositing the remainder of the required total metal layer thickness at a temperature selected on the basis of the desired reliability of the semiconductor device, for example at a temperature below 350.degree. C. This completes the formation of the total (composite) metal layer.
According to the above method, the contact hole can be easily and fully filled with metal, by using the same sputtering equipment used for the conventional deposition method and then annealing the deposited metal. Therefore, even a contact hole with a high aspect ratio can be completely filled. However, when a void is formed in the contact hole or when the step coverage of the metal layer is inadequate, the contact hole cannot be filled up while maintaining such a semiconductor wafer with metal layer at a certain temperature and vacuum level. Further, although a secondary metal layer is subsequently formed on the semiconductor wafer having a previously deposited primary metal layer, good step coverage of the contact hole cannot be assured, and the reliability of the manufactured semiconductor device is degraded due to this inadequate step coverage.
For preventing a void formation and obtaining a good step coverage and a planarized surface of a wiring layer, S. I. Lee (one of the present inventors) et al. have an invention entitled "Method for Manufacturing a Semiconductor Device," and filed as U.S. patent application Ser. No. 07/828,458 now pending in the USPTO. This invention relates to a method for forming a metal wiring layer through a contact hole in a semiconductor device, which comprises the steps of forming a first metal layer on a semiconductor substrate coated with an insulating layer having a contact hole formed thereon, heat-treating the first metal layer to completely fill up the contact hole with a metal of the first metal layer, forming a second metal layer on the first metal layer and then heat-treating the second metal layer to planarize a surface thereof.
According to the invention described in the Lee et al. application, the above second metal layer is heat-treated in the same manner as the first metal layer, to thereby planarize the surface of the metal layer to thereby improve a subsequent photolithography process before forming a metal wiring pattern. Additionally, a metal with no Si component and a metal with a Si component may deposited to form a composite metal layer. When the temperature of the semiconductor substrate is lowered, a metal layer with no Si component absorbs Si atoms from the metal with the Si component. Therefore, Si precipitates are not formed on the surface of the semiconductor substrate after forming the wiring pattern. Although Si precipitate formation is prevented, when forming a composite metal layer-according to the above invention, when a poor diffusion barrier layer formed on the inner surface of a contact hole exists, a fine junction spiking occurs, by which the junction is deteriorated, and which, over time, will increase leakage current.
For preventing this fine junction spiking, Lee et al. further have an invention entitled "Semiconductor Device and Manufacturing Method thereof", and filed as U.S. patent application Ser. No. 07/910,894 now pending in the USPTO.
It is also presently known that, for improving the reliability of the semiconductor by preventing degradation of the shallow junction characteristics due to Al spiking, a barrier layer can be formed in the contact hole formed on the semiconductor wafer. For example, the formation of a titanium nitride film by a reactive sputtering method is disclosed in J. Vac. Sci. Technol., A4(4), 1986, pp. 1850-1854. In U.S. Pat. No. 4,897,709 (by Natsuki Yokoyama et al.), there is described a semiconductor device including a titanium nitride film serving as a barrier layer which is formed in a contact hole for preventing a reaction between the metal wiring layer and the semiconductor substrate. The titanium nitride film can be formed by a low pressure CVD method implemented with a cold-type CVD apparatus. The resultant film has excellent characteristics with good step coverage for a considerably fine hole having a large aspect ratio. After forming the titanium nitride film, a wiring layer is formed by a sputtering method using an Al alloy.
Additionally, in the above-mentioned Yoda Dakashi et al patent publication, there is disclosed a method for manufacturing a semiconductor device which comprises the step of forming double barrier layers for preventing a reaction between the wiring layer and the semiconductor substrate or an insulation layer, on the inner surface of the contact hole.
Additionally, in Japanese Patent Laid-open Publication No. 61-183942, there is described a method for forming a barrier layer which comprises the steps of forming a refractory metal layer by depositing a metal such as Mo, W, Ti or Ta, forming a titanium nitride layer on the refractory metal layer, and heat-treating the metal layer and the titanium nitride layer to thereby form a refractory metal silicide layer at the inter-surface of the refractory metal layer and semiconductor substrate by a reaction therebetween. Thus, the barrier characteristic is improved. The heat-treating the diffusion barrier layer is performed by an annealing process under a nitrogen atmosphere at a temperature of 450.degree. C. for about 30 minutes. When the barrier layer does not undergo the annealing process, a junction spiking occurs in a subsequent sintering step after Al sputtering or in sputtering Al or an Al alloy at a temperature above 450.degree. C., which is undesirable.
Also, after forming the diffusion barrier layer, a semiconductor wafer should be transported into a sputtering apparatus for forming a metal wiring layer. Thus, the diffusion barrier layer is exposed to the atmosphere. Exposing the diffusion barrier layer to the atmosphere or annealing process enables a quite small amount of atoms of the diffusion barrier layer to react with oxygen to form a very thin oxide layer on the surface portion of the diffusion barrier layer, which improves the diffusion barrier effect. This is called a "stuffing effect." On the oxide layer, the mobility of aluminum atoms reduces and when depositing an Al-1% Si-0.5% Cu alloy to a thickness of about 6,000 .ANG. at a room temperature, the metal layer thus obtained has a grain size as small as 0.2 .mu.m. Thus, the step coverage of a sputtered Al is insufficient.
In the meantime, on a diffusion barrier layer which is not exposed to the atmosphere or the annealing process, aluminum reacts with the diffusion barrier layer during a subsequent heat-treating step at a high temperature or when depositing an aluminum film by sputtering at a high temperature, to thereby deteriorate the barrier effect of the diffusion barrier layer. Additionally, the surface of the Al metal layer becomes rugged and a surface reflectivity thereof becomes low, which lowers the efficiency of a subsequent photolithography process. Therefore, the annealing process is essential.
To improve wettabilities between the barrier metal and an Al wire, Hagita Masafumi suggested a method for forming a diffusion barrier layer comprising a step of implanting oxygen or silicon into the barrier metal after heat-treating TiN layer as a diffusion barrier layer (Japanese Patent Laid-Open Publication No. 2-26052). Also, Dipankar Pramanik et al. reported a grain size and intragrain roughness of aluminum films studied for various underlayer ("Effect of Underlayer on Sputtered Aluminum Grain Structure and Its correlation with Step Coverage in Submicron Vias", by Dipankar Pramanik and Vivek Jain, Jun. 12-13, 1990 VMIC Conference pp 332-334). According to Dipankar Pramanik et al., when at an initial stage of Al deposition, a large island is formed on the sidewalls, and excellent step coverage was obtained to thereby result a continuous Al film. From this, it can be noted that if the grain size on the sidewalls is large, a continuous metal film can be obtained and can easily migrate into a contact hole without discontinuity of a metal layer when heat-treating the metal layer according to the C. S. Park method. This is due to the increased wettability between the underlayer and the sputtered Al.
The present inventors have found that providing a reactive spacer which has a good wettability with a sputtered Al on the sidewalls of a contact hole and therefore produces a large island at the initial sputtering stage (that is, large grain of the sputtered Al film), improves the step coverage of the sputtered Al film and the reflow of the Al metal layer into the contact hole. On these bases, the present invention has been accomplished.